Fractal quantization

O. Cadenas, G. M. Megson

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A Fractal Quantizer is proposed that replaces the expensive division operation for the computation of scalar quantization by more modest and available multiplication, addition and shift operations. Although the proposed method is iterative in nature, simulations prove a virtually undetectable distortion to the naked eye for JPEG compressed images using a single iteration. The method requires a change to the usual tables used in JPEG algorithms but of similar size. For practical purposes, performing quantization is reduced to a multiplication plus addition operation easily programmed in either low-end embedded processors and suitable for efficient and very high speed implementation in ASIC or FPGA hardware. FPGA hardware implementation shows up to x15 area-time savingscompared to standars solutions for devices with dedicated multipliers. The method can be also immediately extended to perform adaptive quantization.

Original languageEnglish
Title of host publication2004 IEEE International Symposium on Consumer Electronics - Proceedings
Pages461-464
Number of pages4
Publication statusPublished - 2004
Externally publishedYes
Event2004 IEEE International Symposium on Consumer Electronics - Proceedings - Reading, United Kingdom
Duration: 1 Sept 20043 Sept 2004

Publication series

Name2004 IEEE International Symposium on Consumer Electronics - Proceedings

Conference

Conference2004 IEEE International Symposium on Consumer Electronics - Proceedings
Country/TerritoryUnited Kingdom
CityReading
Period1/09/043/09/04

Keywords

  • Fixed-point methods
  • FPGA
  • JPEG
  • Scalar quantization

Cite this